Intel Developer Forum Fall 2004: Day 1 Keynote
by Derek Wilson on September 7, 2004 5:11 PM EST- Posted in
- Trade Shows
Pushing Parallelism
Finally, we have the demo we'd all been waiting for. Intel showed a 4p Itanium server running 4 dual core processors. This results in windows seeing 16 logical processors and reveals a crazy looking task manager window. The reason each dual core processor appears as four is that each core support Hyperthreading. Here's what ctrl+alt+del looks like with 4 parallel 1.7billion transistor dual core Itaniums:
The demo Intel ran on dual core processors was a very complex weather simulator.
While very cool, such a brief taste of the technology always leaves us wanting more. Unfortunately, Intel is being very tight lipped about their dual core endeavors in other areas. They have stated that dual core processors will be available in 2005, and that they expect some very high adoption rates to push dual core computing to 40% of desktops by 2006, and 85% of servers (which would be dual and multi core). They say the technology is also well suited to mobile devices, but we don't really have any more info than that. It is very clear that Intel will be targeting this area very aggressively as they expect the mobile market to be 70% dual core in 2006.
We were able to get a further lesson in parallelism in Intel's guests from NASA. The Space Administration is apparently working on a supercomputer using and sgi Itanium 2 server targeted at 60 Teraflops of power. This would put it at 50% more compute power than the worlds fastest supercomputer. The supercomputer project is called project Columbia and will feature 10000 processors when completed.
Now that Intel and AMD have both demonstrated dual core processors, it's only a matter of waiting for this technology to come down the pipe, into our labs, and into your homes. Here's to time flying.
We will do some digging while we're here, and hopefully someone will be able to help us discern a few more details about upcoming dual core technology and whatever else Intel may have up their sleeves. It's off to the show floor for now.
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Lonyo - Wednesday, September 8, 2004 - link
We knew that they woul dhave 24MB of cache a while ago.There was a post on the Anandtech forums asking why you would need such a large amount of cache.
kherman - Wednesday, September 8, 2004 - link
So, am I the only one that noticed that EACH PROCESOR HAS 24 MEG OF CACHE ON IT!First image on page 3:
http://www.anandtech.com/tradeshows/showdoc.aspx?i...
ysrgrathe - Wednesday, September 8, 2004 - link
iCube is supposed to be presenting their NMP-5000A network media player at the IDF. They won an award last year for their NMP-4000 model, which has also received a lot of positive reviews. I'm interested to know more; iCube has nothing on their site other than a press release about the IDF presentation an a picture showing dual antennas.From last year's timeline I would expect the product to launch around Christmas; would be nice to have some info before then. Anyone at the convention hear anything?
JarredWalton - Wednesday, September 8, 2004 - link
^^^ This is why you shouldn't do drugs, kids.AMDjihad - Wednesday, September 8, 2004 - link
AHAHAH> INtel loses like a faceusut. AHAHA. Whorlovas. Intel loses. I agrre witgb alkb of you. Intel sucks. HAHAHA> OPertin ins bwext at everythoing. Hah wether simulation.s I can do that. HAhahha.TrogdorJW - Wednesday, September 8, 2004 - link
#12 - Itanium 2 can issue up to 8 instructions per clock, but stalls on one set of instructions can still occur. If you have hyper-threading, you have more potential to fill all of the available issue slots. That's why the POWER5 chip from IBM also has a version of hyperthreading, although I believe IBM calls it "symmetric multi-threading" (SMT). Oh, and Itanium also has more FP/SSE execution units than the P4/Xeon, which is why it has such "kick booty FP".#8 - That really didn't make much sense, partly due to the incorrect use of the Enter key. But let's address this: "Intel has not had a demonstrable lead in design or manufacturing in several years. They have only been maintaining parity with the competition. They intially argued against the need for .13 micron and smaller die shrink, they followed the lead of IBM and AMD. And followed again when copper replaced aluminum in the CPU." Ugh, where to begin...
Okay, let's make this clear. Intel has never argued against .13 micron or any other process shrinks. They have said at times that it was not necessary *YET*, and that they would pursue it in the future. This happened with copper interconnects (AMD used them in .18 micron while Intel waited until late in their .13 micron use), and it happened with x86-64. Don't confuse "we aren't doing that yet" with "we aren't pursuing that *ever*".
You can make a case for some issues with their designs of late, but as far as technology? We've seen 90 nm parts from Intel for almost a year now (more if you count early samples), while AMD is only just starting to ship them. IBM went with SOI first and Intel went with strained silicon. They're both pushing the process technology in different ways. To say Intel hasn't been perfect is absolutely valid, but to say they're failing completely (which seems to be the gist of your post) is taking it way too far.
Just my opinion here, of course.
mkruer - Tuesday, September 7, 2004 - link
The only advantade that the Itanic has in computer operations is that is has a kick booty FP operation. problem is that most progrmas use limited floating point. on top of that I would not be to supprised to see the FP core migrating into the Xeon, or what ever intel is going to call their next gen chipsprockkets - Tuesday, September 7, 2004 - link
Big deal, 1.7 billion transistors, probably 95% of that is just cache memory.Again, why would Itaniums need Hyperthreading? If your EPIC code alreay is made to process so many instructions at once in parallel, then how is hypthreading going to make any difference?
ksherman - Tuesday, September 7, 2004 - link
sorry, my post was intended for #8 not #9ksherman - Tuesday, September 7, 2004 - link
^ half that didnt make sense...and I am sure that 4 dual core opterons could probably do real time weather simulations too, its not an Intel exclusive capability...