Intel Developer Forum Conference - Spring 2001: Part 1

DDR for Servers: It all makes sense

We've heard countless times from Intel that their DDR focus will primarily be for servers, yet Intel does not have a single DDR chipset in their product line.  With the Intel Xeon being launched next quarter, and it being a server part, does anyone see a problem with this?

Intel doesn't, because Intel won't be making the majority of the server chipsets for the Intel Xeon (there is the i860 which is a MP version of the i850 for the Intel Xeon); instead, ServerWorks will.  We all remember ServerWorks from our recent review of their ServerSet III HEsl chipset, which makes use of dual interleaved 64-bit PC133 SDRAM channels to offer DDR memory bandwidth figures at PC133 SDRAM costs.  The problem we ran into with the HEsl was that the Pentium III's 133MHz FSB just isn't enough to demand that sort of memory bandwidth; the Pentium 4's 100MHz Quad-pumped FSB is.

Since the Intel Xeon will share the same FSB as the current Pentium 4, and since we have seen how memory bandwidth hungry a single Pentium 4 processor is, we can only imagine how memory bandwidth hungry two or even four Intel Xeon processors will be.  This is especially true if each processor is capable of SMT, where much more data is being requested and used at the same time.  Needless to say, even a 4-way interleaved SDRAM memory controller wasn't going to help ServerWorks here. 

There is definitely a reason Intel went to ServerWorks for the Intel Xeon chipset: ServerWorks' interleaving memory controller.